1. D- flip flop can be used as _________________.
A. A delay switch
B. Differentiator
C. Divider Circuit
D. All of the above
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2. The _________________ gates are known as "Universal Gates".
A. NAND and NOR
B. NAND and AND
C. AND and OR
D. EX-NOR and EX-OR
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A. NAND and NOR
3. Which of the following circuits selects one of the n data inputs and routes it to the output?
A. Flip-Flop
B. Multiplexer
C. Demultiplexer
D. Decoder
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B. Multiplexer
4. How many bytes does a 48K computer memory contain ?
A. 49152
B. 48000
C. 48152
D. 47152
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A. 49152
5. The refreshing range of dynamic RAMs is in the range of _____________.
A. 2 milliseconds
B. 2 milliseconds
C. 50 milliseconds
D. 500 milliseconds
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A. 2 milliseconds
6. IC 7408 represents
A. 2-input AND Gate
B. 3-input AND Gate
C. 2-input OR Gate
D. 2-input NAND Gate
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A. 2-input AND Gate
7. In Integrated circuit technologies, LSI stands for
A. Very Large Scale Integration
B. Large Scale Integration
C. Large Symbolic Integration
D. Long Size Integration
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B. Large Scale Integration
8. SIPO stands for
A. Shift register input and parallel output
B. Sequential input and processed output
C. Serial input parallel output
D. Sequential input and parity output
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C. Serial input parallel output
9. PIPO mode needs following clock pulses to load a 6-bit number into a register
A. 1
B. 2
C. 3
D. 4
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A. 1
10. In shift register 8 bit binary number is to be shifted into 8 Flip-Flop shift register, following number of clock pulses will be required to complete this operation
A. 4
B. 8
C. 16
D. 32
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D. 32
A. A delay switch
B. Differentiator
C. Divider Circuit
D. All of the above
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A. NAND and NOR
B. NAND and AND
C. AND and OR
D. EX-NOR and EX-OR
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A. NAND and NOR
A. Flip-Flop
B. Multiplexer
C. Demultiplexer
D. Decoder
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B. Multiplexer
A. 49152
B. 48000
C. 48152
D. 47152
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A. 49152
A. 2 milliseconds
B. 2 milliseconds
C. 50 milliseconds
D. 500 milliseconds
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A. 2 milliseconds
A. 2-input AND Gate
B. 3-input AND Gate
C. 2-input OR Gate
D. 2-input NAND Gate
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A. 2-input AND Gate
A. Very Large Scale Integration
B. Large Scale Integration
C. Large Symbolic Integration
D. Long Size Integration
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B. Large Scale Integration
A. Shift register input and parallel output
B. Sequential input and processed output
C. Serial input parallel output
D. Sequential input and parity output
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C. Serial input parallel output
A. 1
B. 2
C. 3
D. 4
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A. 1
A. 4
B. 8
C. 16
D. 32
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D. 32
A. A delay switch